(B15172xx or B18172xx) Service processor early termination reference codes
A B15172xx or B18172xx reference code indicates that an exception occurred in a service processor firmware-detected operation.
About this task
Procedure
What to do next
| SRC | Description/Action | Failing Item |
|---|---|---|
| B1517200 | Invalid boot request | FSPSP02 |
| B1517201 | Service processor failure | FSPSP02 |
| B1517202 | The permanent and temporary firmware sides are both marked invalid | FSPSP02 |
| B1517203 | Error setting boot parameters | FSPSP02 |
| B1517204 | Error reading boot parameters | FSPSP02 |
| B1517205 | Boot code error | FSPSP02 |
| B1517206 | Unit check timer was reset | FSPSP02 |
| B151720A | Power-off reset occurred. FipsDump should be analyzed: Possible hardware problem | FSPSP02 |
| B1811404 | IRPC manages the low-level IIC bus interface to remote power controllers (RPCs) on some types of servers. | See Note at bottom of table. |
| B1811510 | SCED collects and reports VPD found in the system unit hardware. Data collected from the hardware is analyzed and stored in the file system of the service processor. Hardware VPD update facilities are also provided. VPD collection and reporting provides a system-wide view of the current hardware configuration. | See Note at bottom of table. |
| B1811523 | SCED collects and reports VPD found in the system unit hardware. Data collected from the hardware is analyzed and stored in the file system of the service processor. Hardware VPD update facilities are also provided. VPD collection and reporting provides a system-wide view of the current hardware configuration. | See Note at bottom of table. |
| B181156A | SCED collects and reports VPD found in the system unit hardware. Data collected from the hardware is analyzed and stored in the file system of the service processor. Hardware VPD update facilities are also provided. VPD collection and reporting provides a system-wide view of the current hardware configuration. | See Note at bottom of table. |
| B1812028 | The system power interface (SPIF) component provides a communication interface between service processor components and the system power control network (SPCN). The server uses SPIF to obtain the system power state and other data. | See Note at bottom of table. |
| B1812029 | The system power interface (SPIF) component provides a communication interface between service processor components and the system power control network (SPCN). The server uses SPIF to obtain the system power state and other data. | See Note at bottom of table. |
| B1812033 | The system power interface (SPIF) component provides a communication interface between service processor components and the system power control network (SPCN). The server uses SPIF to obtain the system power state and other data. | See Note at bottom of table. |
| B1812100 | REMP manages the high-level communication protocol between the service processor and the RPCs on some types of servers. | See Note at bottom of table. |
| B181300A | See Note at bottom of table. | |
| B1816009 | The SMGR component is responsible for supervising the IPL. It determines the validity of an IPL request and attempts to IPL the system. | See Note at bottom of table. |
| B1817028 | The ERRL component provides data logging, entry management, and the reporting of application errors to the operating system. | See Note at bottom of table. |
| B1817200 | Invalid boot request | FSPSP02 |
| B1817201 | Service processor failure | FSPSP02 |
| B1817202 | The permanent and temporary firmware sides are both marked invalid | FSPSP02 |
| B1817203 | Error setting boot parameters | FSPSP02 |
| B1817204 | Error reading boot parameters | FSPSP02 |
| B1817205 | Boot code error | FSPSP02 |
| B1817206 | Unit check timer was reset | FSPSP02 |
| B1817207 | Error reading from NVRAM | FSPSP02 |
| B1817208 | Error writing to NVRAM | FSPSP02 |
| B1817209 | The service processor boot watchdog timer expired and forced the service processor to attempt a boot from the other firmware image in the service processor flash memory. | FSPSP02 |
| B181720A | Power-off reset occurred. FipsDump should be analyzed: Possible software problem. | FSPSP02 |
| B1818600 | The PERC component allows a service processor application to collect some flight recorder information (FFDC) when the service processor receives an unexpected signal. | See Note at bottom of table. |
| B1818903 | The SINK component synchronizes the time when a server process is ready to interact with a client process. | See Note at bottom of table. |
| B1818A09 | The UTIL component provides common functionality throughout the service processor environment, such as common file, registry, and semaphore manipulation. | See Note at bottom of table. |
| B1818A0E | The UTIL component provides common functionality throughout the service processor environment, such as common file, registry, and semaphore manipulation. | See Note at bottom of table. |
| B1819519 | The MBOX component handles certain hardware on the service processor (called the mailbox) that is accessible to both the operating system and the service processor. The mailbox enables the system to transfer small amounts of data between the service processor and operating system, so that they can communicate to each other at runtime. | See Note at bottom of table. |
| B181950D | The MBOX component handles certain hardware on the service processor (called the mailbox) that is accessible to both the operating system and the service processor. The mailbox enables the system to transfer small amounts of data between the service processor and operating system, so that they can communicate to each other at runtime. | See Note at bottom of table. |
| B181A00F | The PANL component processes the pressing of control panel buttons and updates the control panel display appropriately. | See Note at bottom of table. |
| B181A038 | The PANL component processes the pressing of control panel buttons and updates the control panel display appropriately. | See Note at bottom of table. |
| B181A039 | The PANL component processes the pressing of control panel buttons and updates the control panel display appropriately. | See Note at bottom of table. |
| B181A01C | The PANL component processes the pressing of control panel buttons and updates the control panel display appropriately. | See Note at bottom of table. |
| B181A027 | The PANL component processes the pressing of control panel buttons and updates the control panel display appropriately. | See Note at bottom of table. |
| B181B006 | The SVPD component collects and reports VPD found in the hardware of the system unit, which provides a system-wide view of the current hardware configuration. Data collected from the hardware is analyzed and stored in file system of the service processor. SVPD also provides hardware VPD update facilities. | See Note at bottom of table. |
| B181B030 | The SVPD component collects and reports VPD found in the hardware of the system unit, which provides a system-wide view of the current hardware configuration. Data collected from the hardware is analyzed and stored in file system of the service processor. SVPD also provides hardware VPD update facilities. | See Note at bottom of table. |
| B181B060 | The SVPD component collects and reports VPD found in the hardware of the system unit, which provides a system-wide view of the current hardware configuration. Data collected from the hardware is analyzed and stored in file system of the service processor. SVPD also provides hardware VPD update facilities. | See Note at bottom of table. |
| B181B08C | The SVPD component collects and reports VPD found in the hardware of the system unit, which provides a system-wide view of the current hardware configuration. Data collected from the hardware is analyzed and stored in file system of the service processor. SVPD also provides hardware VPD update facilities. | See Note at bottom of table. |
| B181C008 | See Note at bottom of table. | |
| B181E500 | When the service processor receives an attention
from system hardware, PRDF examines the error registers in the system
to determine what happened and creates an error log entry that calls
out one or more failing items. Notes:
|
See Note at bottom of table. |
| B181EF88 | The BDMP component dumps data that the system
can use to debug a failure that occurs when the service processor
and bulk power subsystems encounter an error on servers that are housed
in 24-inch racks. The following service processor or bulk power subsystem
errors might cause this type of dump:
|
See Note at bottom of table. |
| B181F023 | After the system detects a checkstop or other hardware error condition, the DUMP component gathers required hardware and possibly system memory contents to facilitate error recreation and analysis. | See Note at bottom of table. |
| B181F100 | The HJTG component provides an interface for scanning data from firmware into the actual chips or from the chips into the firmware. The JtagInterface object represents the physical JTAG interface that is internal to each hardware chip. Firmware uses this piece of chip logic to communicate with the chip, and it is used anytime a JTAG operation is performed. | See Note at bottom of table. |
| B181F12F | The HJTG component provides an interface for scanning data from firmware into the actual chips or from the chips into the firmware. The JtagInterface object represents the physical JTAG interface that is internal to each hardware chip. Firmware uses this piece of chip logic to communicate with the chip, and it is used anytime a JTAG operation is performed. | See Note at bottom of table. |
| B181F131 | The HJTG component provides an interface for scanning data from firmware into the actual chips or from the chips into the firmware. The JtagInterface object represents the physical JTAG interface that is internal to each hardware chip. Firmware uses this piece of chip logic to communicate with the chip, and it is used anytime a JTAG operation is performed. | See Note at bottom of table. |
| B181F134 | The HJTG component provides an interface for scanning data from firmware into the actual chips or from the chips into the firmware. The JtagInterface object represents the physical JTAG interface that is internal to each hardware chip. Firmware uses this piece of chip logic to communicate with the chip, and it is used anytime a JTAG operation is performed. | See Note at bottom of table. |
| B181F407 | The RULE component provides access to certain configuration and engineering data that is stored in the esw_rtbl component. The system uses the data stored in the edw_rtbl component to model the system and to read from the hardware. | See Note at bottom of table. |
Note: The server group
has not defined any additional action for this SRC. It is assumed
that the serviceable event FRU
list contains all needed repair information. If the FRU list does
not repair the problem, contact your next level of support.
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